From 1e92a65aaad1a7a9c627f915011f077df6a5444c Mon Sep 17 00:00:00 2001 From: Zak Yani Star Fenton Date: Tue, 26 Aug 2025 18:05:30 +1000 Subject: [PATCH] Partial maths fix, div/rem operators now work for 32/64 bit code (should be mirrored in fossil...). Some issues may still remain with different combinations of types/signednesses/operators and won't be fixed on x86 as pervasively as on RV64. --- ccbgeneric.h | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/ccbgeneric.h b/ccbgeneric.h index 70fed4a..54407fb 100644 --- a/ccbgeneric.h +++ b/ccbgeneric.h @@ -1826,7 +1826,9 @@ static void ccb_target_gen_binary_arithmetic_integer(ccb_t* ccb, ccb_ast_t* ast) ccb_target_gen_emit("signx64x32 r0"); } else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) { - ccb_target_gen_emit("sext.w a0, a0"); + if (ast->left->ctype->size <= 4) { + ccb_target_gen_emit("sext.w a0, a0"); + } } else if ((ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM || ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_NASM)) { ccb_target_gen_emit("cqo"); @@ -1838,10 +1840,14 @@ static void ccb_target_gen_binary_arithmetic_integer(ccb_t* ccb, ccb_ast_t* ast) ccb_target_gen_emit("div r0, r2, r1"); } else if (ccb_target_family(ccb) == CCB_ARCH_FAMILY_RISCV) { - ccb_target_gen_emit("%s a0, a0, a1", ast->type == '%' ? "rem" : "div"); - //if (ast->type != '%'){ - ccb_target_gen_emit("sext.w a0, a0"); - //} + if (ast->ctype->size == 8) { + ccb_target_gen_emit("%s a0, a0, a1", ast->type == '%' ? "rem" : "div"); + } else { + ccb_target_gen_emit("%s a0, a0, a1", ast->type == '%' ? "remw" : "divw"); + //if (ast->type != '%'){ + ccb_target_gen_emit("sext.w a0, a0"); + //} + } } else if ((ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_FASM || ccb_target_asmfmt(ccb) == CCB_TARGET_ASMFMT_NASM)) { ccb_target_gen_emit("idiv rcx");