80 lines
1.5 KiB
ArmAsm
80 lines
1.5 KiB
ArmAsm
// This is NEW CODE for saving/restoring FPU registers and possibly other activities
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.text
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.option norvc
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.globl fpu_save
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fpu_save:
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fsd f0, 8(a0)
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fsd f1, 16(a0)
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fsd f2, 24(a0)
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fsd f3, 32(a0)
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fsd f4, 40(a0)
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fsd f5, 48(a0)
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fsd f6, 56(a0)
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fsd f7, 64(a0)
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fsd f8, 72(a0)
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fsd f9, 80(a0)
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fsd f10, 88(a0)
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fsd f11, 96(a0)
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fsd f12, 104(a0)
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fsd f13, 112(a0)
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fsd f14, 120(a0)
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fsd f15, 128(a0)
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fsd f16, 136(a0)
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fsd f17, 144(a0)
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fsd f18, 152(a0)
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fsd f19, 160(a0)
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fsd f20, 168(a0)
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fsd f21, 176(a0)
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fsd f22, 184(a0)
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fsd f23, 192(a0)
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fsd f24, 200(a0)
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fsd f25, 208(a0)
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fsd f26, 216(a0)
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fsd f27, 224(a0)
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fsd f28, 232(a0)
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fsd f29, 240(a0)
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fsd f30, 248(a0)
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fsd f31, 256(a0)
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frcsr t0 // Get float control register
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sd t0, 0(a0) // Save the control register bits
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ret
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.globl fpu_restore
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fpu_restore:
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fld f0, 8(a0)
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fld f1, 16(a0)
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fld f2, 24(a0)
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fld f4, 40(a0)
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fld f5, 48(a0)
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fld f6, 56(a0)
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fld f7, 64(a0)
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fld f8, 72(a0)
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fld f9, 80(a0)
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fld f10, 88(a0)
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fld f11, 96(a0)
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fld f12, 104(a0)
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fld f13, 112(a0)
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fld f14, 120(a0)
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fld f15, 128(a0)
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fld f16, 136(a0)
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fld f17, 144(a0)
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fld f18, 152(a0)
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fld f19, 160(a0)
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fld f20, 168(a0)
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fld f21, 176(a0)
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fld f22, 184(a0)
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fld f23, 192(a0)
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fld f24, 200(a0)
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fld f25, 208(a0)
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fld f26, 216(a0)
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fld f27, 224(a0)
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fld f28, 232(a0)
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fld f29, 240(a0)
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fld f30, 248(a0)
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ld t0, 0(a0) // Load the float control register bits
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fscsr t0 // Set float control register
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ret
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